ASSEMBLER INSTRUCTIONS Symbols Meaning ------- ------- label Symbolic label, 1-5 alphanumeric characters and periods m Memory location represented by an expression I Indirect addressing indicator C Clear flag indicator (m,m+1) Two-word floating-point value in m and m+1 comments Optional comments [ ] Optional portion of field { } One of set may be selected P Program Counter ( ) Contents of location /\ Logical product -\/- Exclusive "or" \/ Inclusive "or" A A-register B B-register E E-register A.n Bit n of A-register B.n Bit n of B-register b Bit positions in B- and A-register ___ (A) Complement of contents of Register A ___ (B) Complement of contents of Register B (AB) Two-word floating-point value in registers A and B sc Channel select code represented by an expression d Decimal constant o Octal constant r Repeat count n Integer constant lit Literal value B-1 MACHINE INSTRUCTIONS MEMORY REFERENCE Jump and Increment-Skip ISZ m[,I] (m)+1 -> m; then if (m) = 0, execute P+2 otherwise execute P+1 JMP m[,I] Jump to m; m -> P JSB m[,I] Jump subroutine to m; P + 1 -> m; m + 1 -> P Add, Load and Store ADA m[,I] (m) + (A) -> A lit ADB m[,I] (m) + (B) -> B lit LDA m[,I] (m) -> A lit LDB m[,I] (m) -> B lit STA m[,I] (A) -> m STB m[,I] (B) -> m Logical AND m[,I] (m) /\ (A) -> A lit XOR m[,I] (m) -\/- (A) -> A lit IOR m[,I] (m) \/ (A) -> A lit CPA m[,I] If (m) != (A), execute P + 2, otherwise lit execute P + 1 CPB m[,I] If (m) != (B), execute P + 2, otherwise lit execute P + 1 REGISTER REFERENCE Shift-Rotate CLE 0 -> E ALS Shift (A) left one bit, 0 -> A.0, A.15 unaltered BLS Shift (B) left one bit, 0 -> B.0, B.15 unaltered ARS Shift (A) right one bit, (A.15) -> A.14 BRS Shift (B) right one bit, (B.15) -> B.14 RAL Rotate (A) left one bit RBL Rotate (B) left one bit B-2 Shift-Rotate (Continued) RAR Rotate (A) right one bit RBR Rotate (B) right one bit ALR Shift (A) left one bit, 0 -> A.15 BLR Shift (B) left one bit, 0 -> B.15 ERA Rotate E and A right one bit ERB Rotate E and B right one bit ELA Rotate E and A left one bit ELB Rotate E and B left one bit ALF Rotate A left four bits BLF Rotate B left four bits SLA If (A.0) = 0, execute P + 2, otherwise execute P + 1 SLB If (B.0) = 0, execute P + 2, otherwise execute P + 1 Shift-Rotate instructions can be combined as follows: ALS ALS ARS ARS RAL RAL RAR , CLE , SLA , RAR ALR ALR ALF ALF ERA ERA ELA ELA BLS BLS BRS BRS RBL RBL RBR , CLE , SLB , RBR BLR BLR BLF BLF ERB ERB ELB ELB No-operation NOP Execute P + 1 Alter-Skip CLA 0's -> A CLB 0's -> B ___ CMA (A) -> A ___ CMB (B) -> B CCA 1's -> A CCB 1's -> B CLE 0 -> E ___ CME (E) -> E B-3 CCE 1 -> E SEZ If (E) = 0, execute P + 2, otherwise execute P + 1 SSA If (A.15) = 0, execute P + 2, otherwise execute P + 1 SSB If (B.15) = 0, execute P + 2, otherwise execute P + 1 INA (A) + 1 -> A INB (B) + 1 -> B SZA If (A) = 0, execute P + 2, otherwise execute P + 1 SZB If (B) = 0, execute P + 2, otherwise execute P + 1 SLA If (A.0) = 0, execute P + 2, otherwise execute P + 1 SLB If (B.0) = 0, execute P + 2, otherwise execute P + 1 RSS Reverse sense of skip instructions. If no skip instructions precede, execute P + 2 Alter-Skip instructions can be combined as follows: CLA CLE CMA , SEZ , CME , SSA , SLA , INA , SZA , RSS CCA CCE CLB CLE CMB , SEZ , CME , SSB , SLB , INB , SZB , RSS CCB CCE INPUT/OUTPUT, OVERFLOW, and HALT Input/Output STC sc [,C] Set control bit.sc, enable transfer of one element of data between device.sc and buffer.sc CLC sc [,C] Clear control bit.sc; If sc = 0 clear all control bits LIA sc [,C] (buffer.sc) -> A LIB sc [,C] (buffer.sc) -> B MIA sc [,C] (buffer.sc) \/ (A) -> A MIB sc [,C] (buffer.sc) \/ (B) -> B OTA sc [,C] (A) -> buffer.sc OTB sc [,C] (B) -> buffer.sc STF sc Set flag bit.sc; If sc = 0, enable interrupt system. sc = 1 sets overflow bit. CLF sc Clear flag bit.sc; If sc = 0, disable interrupt system. If sc = 1, clear overflow bit. SFC sc If (flag bit.sc) = 0, execute P + 2, otherwise execute P + 2. If sc = 1, test overflow bit. SFS sc If (flag bit.sc) = 1, execute P + 2, otherwise execute P + 2. If sc = 1, test overflow bit. B-4 Overflow CLO 0 -> overflow bit STO 1 -> overflow bit SOC [C] If (overflow bit) = 0, execute P + 2, otherwise execute P + 1 SOS [C] If (overflow bit) = 1, execute P + 2, otherwise execute P + 1 Halt HLT [sc [,C]] Halt computer EXTENDED ARITHMETIC UNIT (requires EAU version of Assembler or Extended Assembler) MPY m[,I] (A) * (m) -> (B and A) lit DIV m[,I] (B and A) / (m) -> A, remainder -> B lit DLD m[,I] (m) and (m+1) -> A and B lit DST m[,I] (A) and (B) -> m and m+1 lit ASR b Arithmetically shift (BA) right b bits, B.15 extended ASL b Arithmetically shift (BA) left b bits, B.15 unaltered, 0's to A.0 RRR b Rotate (BA) right b bits RRL b Rotate (BA) left b bits LSR b Logically shift (BA) right b bits, 0's to B.15 LSL b Logically shift (BA) left b bits, 0's to A.0 B-5 PSEUDO INSTRUCTIONS ASSEMBLER CONTROL NAM [name] Specifies relocatable program and its name. ORG m Gives absolute program origin or origin for a segment of relocatable or absolute program. ORR Reset main program location counter at value existing when first ORG or ORB of a string was encountered. ORB Defines base page portion of relocatable program. END [m] Terminates source language program. Produces transfer to program starting location, m, if given. REP r Repeat immediately following statement r times. IFN Include statements in program if control statement contains N. XIF IFZ Include statements in program if control statement contains Z. XIF OBJECT PROGRAM LINKAGE COM name1 [ (size1) ] [, name2 [ (size2) ] [ , ... ] Reserves a block of common storage locations. name identifies segments of block, each of length size. ENT name1 [ , name2 ] [ , ... ] Defines entry points, name, that may be referred to by other programs EXT name1 [ , name2 ] [ , ... ] Defines external locations, name, which are labels of other programs, referenced by this program. ADDRESS AND SYMBOL DEFINITION label DEF m[,I] Generates a 15-bit address which may be referenced indirectly through the label. label ABS m Defines a 16-bit absolute value to be referenced by the label. label EQU m Equates the value, m, to the label. B-6 CONSTANT DEFINITION ASC n,<2n characters> Defines a string of 2n ASCII characters DEC d1 [, d2 ] [, ... ] Records a string of decimal contants of the form: Integer: +/-n Floating-point: +/-n.n +/-n. +/-nE+/-e +/-n.E+/-e +/-.nE+/-e DEX d1 [, d2 ] [, ...] Records a string of extended precision decimal constants of the form: Floating-point: +/-n +/-n.n +/-n. +/-.n +/-nE+/-e +/-n.nE+/-e +/-n.E+/-e +/-.nE+/-e OCT o1 [, o2 ] [, ...] Records a string of octal constants of the form: +/-oooooo STORAGE ALLOCATION BSS m Reserves a storage area of length, m. ARITHMETIC SUBROUTINE CALLS REQUESTS [2] MPY m[,I] (A) * (m) -> (BA) [1] lit DIV m[,I] (BA) / (m) -> A , remainder -> B [1] lit FMP m[,I] (AB) * (m,m+1) -> AB lit FDV m[,I] (AB) / (m,m+1) -> AB lit FAD m[,I] (AB) + (m,m+1) -> AB lit FSB m[,I] (AB) - (m,m+1) -> AB lit DLD m[,I] (m) and (m+1) -> A and B [1] lit DST m[,I] (A) and (B) -> (m) and (m+1) [1] ------------------------ [1] For configurations including Extended Arithmetic Unit, these mnemonics generate hardware instructions when the EAU version of the Assembler or Extended Assembler is used. [2] Not intended for use with DEX formatted numbers. For such numbers, JSB Machine Instructions must be used. B-7 ASSEMBLY LISTING CONTROL UNL Suppress assembly listing output. LST Resume assembly listing output. SKP Skip listing to top of next page. SPC n Skip n lines on listing. SUP Suppress listing of extended code lines (e.g. as produced by subroutine calls). UNS Resume listing of extended code lines. HED Print at top of each page, where is up to 56 ASCII characters. B-8